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llvm::PPCInstrInfo Class Reference

#include <PPCInstrInfo.h>

Inheritance diagram for llvm::PPCInstrInfo:
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Collaboration diagram for llvm::PPCInstrInfo:
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Public Member Functions

 PPCInstrInfo (PPCTargetMachine &TM)
 
virtual const PPCRegisterInfo & getRegisterInfo () const
 
ScheduleHazardRecognizer * CreateTargetHazardRecognizer (const TargetMachine *TM, const ScheduleDAG *DAG) const
 
ScheduleHazardRecognizer * CreateTargetPostRAHazardRecognizer (const InstrItineraryData *II, const ScheduleDAG *DAG) const
 
bool isCoalescableExtInstr (const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SubIdx) const
 
unsigned isLoadFromStackSlot (const MachineInstr *MI, int &FrameIndex) const
 
unsigned isStoreToStackSlot (const MachineInstr *MI, int &FrameIndex) const
 
virtual MachineInstr * commuteInstruction (MachineInstr *MI, bool NewMI) const
 
virtual void insertNoop (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const
 
virtual bool AnalyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const
 
virtual unsigned RemoveBranch (MachineBasicBlock &MBB) const
 
virtual unsigned InsertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl< MachineOperand > &Cond, DebugLoc DL) const
 
virtual bool canInsertSelect (const MachineBasicBlock &, const SmallVectorImpl< MachineOperand > &Cond, unsigned, unsigned, int &, int &, int &) const
 
virtual void insertSelect (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DstReg, const SmallVectorImpl< MachineOperand > &Cond, unsigned TrueReg, unsigned FalseReg) const
 
virtual void copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const
 
virtual void storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const
 
virtual void loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const
 
virtual bool ReverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const
 
virtual bool FoldImmediate (MachineInstr *UseMI, MachineInstr *DefMI, unsigned Reg, MachineRegisterInfo *MRI) const
 
virtual bool isProfitableToIfCvt (MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, const BranchProbability &Probability) const
 
virtual bool isProfitableToIfCvt (MachineBasicBlock &TMBB, unsigned NumT, unsigned ExtraT, MachineBasicBlock &FMBB, unsigned NumF, unsigned ExtraF, const BranchProbability &Probability) const
 
virtual bool isProfitableToDupForIfCvt (MachineBasicBlock &MBB, unsigned NumCycles, const BranchProbability &Probability) const
 
virtual bool isProfitableToUnpredicate (MachineBasicBlock &TMBB, MachineBasicBlock &FMBB) const
 
bool isPredicated (const MachineInstr *MI) const
 
virtual bool isUnpredicatedTerminator (const MachineInstr *MI) const
 
virtual bool PredicateInstruction (MachineInstr *MI, const SmallVectorImpl< MachineOperand > &Pred) const
 
virtual bool SubsumesPredicate (const SmallVectorImpl< MachineOperand > &Pred1, const SmallVectorImpl< MachineOperand > &Pred2) const
 
virtual bool DefinesPredicate (MachineInstr *MI, std::vector< MachineOperand > &Pred) const
 
virtual bool isPredicable (MachineInstr *MI) const
 
virtual bool analyzeCompare (const MachineInstr *MI, unsigned &SrcReg, unsigned &SrcReg2, int &Mask, int &Value) const
 
virtual bool optimizeCompareInstr (MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2, int Mask, int Value, const MachineRegisterInfo *MRI) const
 
virtual unsigned GetInstSizeInBytes (const MachineInstr *MI) const
 

Detailed Description

Definition at line 67 of file PPCInstrInfo.h.

Constructor & Destructor Documentation

PPCInstrInfo::PPCInstrInfo ( PPCTargetMachine &  TM)
explicit

Definition at line 51 of file PPCInstrInfo.cpp.

Member Function Documentation

bool PPCInstrInfo::AnalyzeBranch ( MachineBasicBlock &  MBB,
MachineBasicBlock *&  TBB,
MachineBasicBlock *&  FBB,
SmallVectorImpl< MachineOperand > &  Cond,
bool  AllowModify 
) const
virtual

Definition at line 229 of file PPCInstrInfo.cpp.

References llvm::PPCISD::BDNZ, llvm::PPCISD::BDZ, llvm::MachineBasicBlock::begin(), llvm::MachineOperand::CreateImm(), llvm::MachineOperand::CreateReg(), DisableCTRLoopAnal, llvm::MachineBasicBlock::end(), llvm::MachineInstr::eraseFromParent(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::PPCTargetMachine::getSubtargetImpl(), I, llvm::MachineOperand::isMBB(), llvm::PPCSubtarget::isPPC64(), isUnpredicatedTerminator(), and llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back().

bool PPCInstrInfo::analyzeCompare ( const MachineInstr *  MI,
unsigned &  SrcReg,
unsigned &  SrcReg2,
int &  Mask,
int &  Value 
) const
virtual

Definition at line 1059 of file PPCInstrInfo.cpp.

References llvm::MachineOperand::getImm(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::MachineOperand::getReg().

bool PPCInstrInfo::canInsertSelect ( const MachineBasicBlock &  MBB,
const SmallVectorImpl< MachineOperand > &  Cond,
unsigned  TrueReg,
unsigned  FalseReg,
int &  CondCycles,
int &  TrueCycles,
int &  FalseCycles 
) const
virtual

Definition at line 430 of file PPCInstrInfo.cpp.

References llvm::MachineBasicBlock::getParent(), getReg(), llvm::MachineRegisterInfo::getRegClass(), llvm::MachineFunction::getRegInfo(), llvm::PPCTargetMachine::getSubtargetImpl(), llvm::PPCSubtarget::hasISEL(), MRI, and llvm::SmallVectorTemplateCommon< T >::size().

MachineInstr * PPCInstrInfo::commuteInstruction ( MachineInstr *  MI,
bool  NewMI 
) const
virtual

Definition at line 154 of file PPCInstrInfo.cpp.

References llvm::BuildMI(), llvm::TargetInstrInfo::commuteInstruction(), llvm::RegState::Define, llvm::getDeadRegState(), llvm::MachineInstr::getDebugLoc(), llvm::MachineInstr::getDesc(), llvm::MachineOperand::getImm(), llvm::getKillRegState(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MCInstrDesc::getOperandConstraint(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDead(), llvm::MachineOperand::isKill(), llvm::A64CC::MI, llvm::MachineOperand::setImm(), llvm::MachineOperand::setIsKill(), llvm::MachineOperand::setReg(), and llvm::MCOI::TIED_TO.

void PPCInstrInfo::copyPhysReg ( MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  I,
DebugLoc  DL,
unsigned  DestReg,
unsigned  SrcReg,
bool  KillSrc 
) const
virtual

Definition at line 533 of file PPCInstrInfo.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::getKillRegState(), llvm::MCInstrDesc::getNumOperands(), llvm_unreachable, and OR.

ScheduleHazardRecognizer * PPCInstrInfo::CreateTargetHazardRecognizer ( const TargetMachine *  TM,
const ScheduleDAG *  DAG 
) const

CreateTargetHazardRecognizer - Return the hazard recognizer to use for this target when scheduling the DAG.

Definition at line 57 of file PPCInstrInfo.cpp.

References llvm::TargetInstrInfo::CreateTargetHazardRecognizer(), llvm::PPC::DIR_440, llvm::PPC::DIR_A2, llvm::PPC::DIR_E500mc, llvm::PPC::DIR_E5500, llvm::TargetMachine::getInstrItineraryData(), and llvm::TargetMachine::getSubtarget().

ScheduleHazardRecognizer * PPCInstrInfo::CreateTargetPostRAHazardRecognizer ( const InstrItineraryData *  II,
const ScheduleDAG *  DAG 
) const

CreateTargetPostRAHazardRecognizer - Return the postRA hazard recognizer to use for this target when scheduling the DAG.

Definition at line 72 of file PPCInstrInfo.cpp.

References llvm::PPC::DIR_440, llvm::PPC::DIR_A2, llvm::PPC::DIR_E500mc, llvm::PPC::DIR_E5500, llvm::PPCTargetMachine::getInstrInfo(), and llvm::TargetMachine::getSubtarget().

bool PPCInstrInfo::DefinesPredicate ( MachineInstr *  MI,
std::vector< MachineOperand > &  Pred 
) const
virtual

Definition at line 1008 of file PPCInstrInfo.cpp.

References llvm::array_lengthof(), llvm::TargetRegisterClass::begin(), llvm::MachineOperand::clobbersPhysReg(), llvm::TargetRegisterClass::contains(), llvm::TargetRegisterClass::end(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), I, llvm::ARM_PROC::IE, llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::isRegMask().

bool PPCInstrInfo::FoldImmediate ( MachineInstr *  UseMI,
MachineInstr *  DefMI,
unsigned  Reg,
MachineRegisterInfo *  MRI 
) const
virtual

Definition at line 813 of file PPCInstrInfo.cpp.

References llvm::MachineInstr::eraseFromParent(), llvm::MachineInstr::getDesc(), llvm::MachineOperand::getImm(), llvm::MCInstrDesc::getNumOperands(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::PPCTargetMachine::getSubtargetImpl(), llvm::MachineRegisterInfo::hasOneNonDBGUse(), llvm::MachineOperand::isImm(), llvm::PPCSubtarget::isPPC64(), llvm::MCInstrDesc::isPseudo(), llvm::MachineOperand::isReg(), LI, llvm::MCInstrDesc::OpInfo, and llvm::MachineOperand::setReg().

unsigned PPCInstrInfo::GetInstSizeInBytes ( const MachineInstr *  MI) const
virtual

GetInstSize - Return the number of bytes of code the specified instruction may be. This returns the maximum number of bytes.

Definition at line 1361 of file PPCInstrInfo.cpp.

References llvm::TargetOpcode::DBG_VALUE, llvm::ISD::EH_LABEL, llvm::TargetOpcode::GC_LABEL, llvm::TargetMachine::getMCAsmInfo(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getSymbolName(), llvm::MachineFunction::getTarget(), llvm::ISD::INLINEASM, and llvm::TargetOpcode::PROLOG_LABEL.

virtual const PPCRegisterInfo& llvm::PPCInstrInfo::getRegisterInfo ( ) const
inlinevirtual

getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).

Definition at line 89 of file PPCInstrInfo.h.

Referenced by llvm::PPCTargetMachine::getRegisterInfo(), and optimizeCompareInstr().

unsigned PPCInstrInfo::InsertBranch ( MachineBasicBlock &  MBB,
MachineBasicBlock *  TBB,
MachineBasicBlock *  FBB,
const SmallVectorImpl< MachineOperand > &  Cond,
DebugLoc  DL 
) const
virtual

Definition at line 392 of file PPCInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), llvm::PPCISD::BDNZ, llvm::PPCISD::BDZ, llvm::BuildMI(), llvm::SmallVectorBase::empty(), getReg(), llvm::PPCTargetMachine::getSubtargetImpl(), llvm::PPCSubtarget::isPPC64(), and llvm::SmallVectorTemplateCommon< T >::size().

void PPCInstrInfo::insertNoop ( MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  MI 
) const
virtual

Definition at line 219 of file PPCInstrInfo.cpp.

References llvm::BuildMI().

void PPCInstrInfo::insertSelect ( MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  MI,
DebugLoc  DL,
unsigned  DstReg,
const SmallVectorImpl< MachineOperand > &  Cond,
unsigned  TrueReg,
unsigned  FalseReg 
) const
virtual

Definition at line 470 of file PPCInstrInfo.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::TargetRegisterClass::contains(), llvm::TargetOpcode::COPY, llvm::MachineBasicBlock::getParent(), getReg(), llvm::MachineFunction::getRegInfo(), llvm::PPCTargetMachine::getSubtargetImpl(), llvm::PPCSubtarget::hasISEL(), llvm_unreachable, MRI, llvm::PPC::PRED_EQ, llvm::PPC::PRED_GE, llvm::PPC::PRED_GT, llvm::PPC::PRED_LE, llvm::PPC::PRED_LT, llvm::PPC::PRED_NE, llvm::PPC::PRED_NU, llvm::PPC::PRED_UN, and llvm::SmallVectorTemplateCommon< T >::size().

bool PPCInstrInfo::isCoalescableExtInstr ( const MachineInstr &  MI,
unsigned &  SrcReg,
unsigned &  DstReg,
unsigned &  SubIdx 
) const

Definition at line 89 of file PPCInstrInfo.cpp.

References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), and llvm::MachineOperand::getReg().

unsigned PPCInstrInfo::isLoadFromStackSlot ( const MachineInstr *  MI,
int &  FrameIndex 
) const

Definition at line 103 of file PPCInstrInfo.cpp.

References llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), and llvm::A64DB::LD.

bool PPCInstrInfo::isPredicable ( MachineInstr *  MI) const
virtual

Definition at line 1044 of file PPCInstrInfo.cpp.

References llvm::PPCISD::BCTRL, and llvm::MachineInstr::getOpcode().

bool PPCInstrInfo::isPredicated ( const MachineInstr *  MI) const

Definition at line 904 of file PPCInstrInfo.cpp.

Referenced by isUnpredicatedTerminator().

virtual bool llvm::PPCInstrInfo::isProfitableToDupForIfCvt ( MachineBasicBlock &  MBB,
unsigned  NumCycles,
const BranchProbability &  Probability 
) const
inlinevirtual

Definition at line 173 of file PPCInstrInfo.h.

virtual bool llvm::PPCInstrInfo::isProfitableToIfCvt ( MachineBasicBlock &  MBB,
unsigned  NumCycles,
unsigned  ExtraPredCycles,
const BranchProbability &  Probability 
) const
inlinevirtual

Definition at line 161 of file PPCInstrInfo.h.

bool PPCInstrInfo::isProfitableToIfCvt ( MachineBasicBlock &  TMBB,
unsigned  NumT,
unsigned  ExtraT,
MachineBasicBlock &  FMBB,
unsigned  NumF,
unsigned  ExtraF,
const BranchProbability &  Probability 
) const
virtual

Definition at line 895 of file PPCInstrInfo.cpp.

References MBBDefinesCTR().

virtual bool llvm::PPCInstrInfo::isProfitableToUnpredicate ( MachineBasicBlock &  TMBB,
MachineBasicBlock &  FMBB 
) const
inlinevirtual

Definition at line 180 of file PPCInstrInfo.h.

unsigned PPCInstrInfo::isStoreToStackSlot ( const MachineInstr *  MI,
int &  FrameIndex 
) const

Definition at line 127 of file PPCInstrInfo.cpp.

References llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), and llvm::MachineOperand::isImm().

bool PPCInstrInfo::isUnpredicatedTerminator ( const MachineInstr *  MI) const
virtual

Definition at line 915 of file PPCInstrInfo.cpp.

References llvm::MachineInstr::isBarrier(), llvm::MachineInstr::isBranch(), isPredicated(), and llvm::MachineInstr::isTerminator().

Referenced by AnalyzeBranch().

void PPCInstrInfo::loadRegFromStackSlot ( MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  MBBI,
unsigned  DestReg,
int  FrameIndex,
const TargetRegisterClass *  RC,
const TargetRegisterInfo *  TRI 
) const
virtual

Definition at line 766 of file PPCInstrInfo.cpp.

References llvm::MachineInstr::addMemOperand(), llvm::SmallVectorTemplateCommon< T >::back(), llvm::MachineBasicBlock::end(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlignment(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineBasicBlock::getParent(), llvm::MachineBasicBlock::insert(), llvm::MachineMemOperand::MOLoad, llvm::PPCFunctionInfo::setHasNonRISpills(), llvm::PPCFunctionInfo::setHasSpills(), llvm::PPCFunctionInfo::setSpillsCR(), llvm::PPCFunctionInfo::setSpillsVRSAVE(), and llvm::SmallVectorTemplateCommon< T >::size().

Referenced by llvm::PPCFrameLowering::restoreCalleeSavedRegisters().

bool PPCInstrInfo::optimizeCompareInstr ( MachineInstr *  CmpInstr,
unsigned  SrcReg,
unsigned  SrcReg2,
int  Mask,
int  Value,
const MachineRegisterInfo *  MRI 
) const
virtual

Definition at line 1087 of file PPCInstrInfo.cpp.

References llvm::MachineInstr::addOperand(), llvm::MachineInstrBuilder::addReg(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::TargetOpcode::COPY, llvm::MachineOperand::CreateReg(), llvm::MachineInstr::definesRegister(), DisableCmpOpt, llvm::MachineBasicBlock::end(), llvm::MachineInstr::eraseFromParent(), llvm::MachineInstr::getDebugLoc(), llvm::MachineOperand::getImm(), llvm::MCInstrDesc::getImplicitDefs(), llvm::MCInstrDesc::getImplicitUses(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), getRegisterInfo(), llvm::MachineOperand::getSubReg(), llvm::PPCTargetMachine::getSubtargetImpl(), llvm::PPC::getSwappedPredicate(), llvm::MachineRegisterInfo::getUniqueVRegDef(), I, llvm::ARM_PROC::IE, llvm::MCInstrDesc::ImplicitDefs, llvm::MCInstrDesc::ImplicitUses, llvm::PPCSubtarget::isPPC64(), llvm::RegState::Kill, llvm::A64CC::MI, MII, llvm::MachineInstr::modifiesRegister(), llvm::next(), llvm::PPC::PRED_EQ, llvm::PPC::PRED_NE, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::MachineInstr::readsRegister(), llvm::MachineInstr::setDesc(), llvm::SmallVectorTemplateCommon< T >::size(), llvm::MachineRegisterInfo::use_begin(), and llvm::MachineRegisterInfo::use_end().

bool PPCInstrInfo::PredicateInstruction ( MachineInstr *  MI,
const SmallVectorImpl< MachineOperand > &  Pred 
) const
virtual

Definition at line 926 of file PPCInstrInfo.cpp.

References llvm::PPCISD::BCTRL, llvm::PPCISD::BDNZ, llvm::PPCISD::BDZ, llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), getReg(), llvm::PPCTargetMachine::getSubtargetImpl(), llvm::PPCSubtarget::isPPC64(), llvm_unreachable, llvm::A64CC::MI, llvm::MachineInstr::RemoveOperand(), and llvm::MachineInstr::setDesc().

unsigned PPCInstrInfo::RemoveBranch ( MachineBasicBlock &  MBB) const
virtual

Definition at line 360 of file PPCInstrInfo.cpp.

References llvm::PPCISD::BDNZ, llvm::PPCISD::BDZ, llvm::MachineBasicBlock::begin(), llvm::MachineBasicBlock::end(), and I.

bool PPCInstrInfo::ReverseBranchCondition ( SmallVectorImpl< MachineOperand > &  Cond) const
virtual

Definition at line 803 of file PPCInstrInfo.cpp.

References getReg(), llvm::PPC::InvertPredicate(), and llvm::SmallVectorTemplateCommon< T >::size().

void PPCInstrInfo::storeRegToStackSlot ( MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  MBBI,
unsigned  SrcReg,
bool  isKill,
int  FrameIndex,
const TargetRegisterClass *  RC,
const TargetRegisterInfo *  TRI 
) const
virtual

Definition at line 655 of file PPCInstrInfo.cpp.

References llvm::MachineInstr::addMemOperand(), llvm::SmallVectorTemplateCommon< T >::back(), llvm::MachinePointerInfo::getFixedStack(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getInfo(), llvm::MachineFunction::getMachineMemOperand(), llvm::MachineFrameInfo::getObjectAlignment(), llvm::MachineFrameInfo::getObjectSize(), llvm::MachineBasicBlock::getParent(), llvm::MachineBasicBlock::insert(), llvm::MachineMemOperand::MOStore, llvm::PPCFunctionInfo::setHasNonRISpills(), llvm::PPCFunctionInfo::setHasSpills(), llvm::PPCFunctionInfo::setSpillsCR(), llvm::PPCFunctionInfo::setSpillsVRSAVE(), and llvm::SmallVectorTemplateCommon< T >::size().

Referenced by llvm::PPCFrameLowering::spillCalleeSavedRegisters().

bool PPCInstrInfo::SubsumesPredicate ( const SmallVectorImpl< MachineOperand > &  Pred1,
const SmallVectorImpl< MachineOperand > &  Pred2 
) const
virtual

Definition at line 980 of file PPCInstrInfo.cpp.

References getReg(), llvm::PPC::PRED_EQ, llvm::PPC::PRED_GE, llvm::PPC::PRED_GT, llvm::PPC::PRED_LE, llvm::PPC::PRED_LT, and llvm::SmallVectorTemplateCommon< T >::size().

The documentation for this class was generated from the following files:

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