#include <MachineScheduler.h>

Inheritance diagram for llvm::ScheduleDAGMI:

Collaboration diagram for llvm::ScheduleDAGMI:

Public Member Functions
	ScheduleDAGMI (MachineSchedContext C, MachineSchedStrategy S)

virtual	~ScheduleDAGMI ()

bool	isTrackingPressure () const
	Return true if register pressure tracking is enabled. More...

void	addMutation (ScheduleDAGMutation *Mutation)

bool	canAddEdge (SUnit SuccSU, SUnit PredSU)
	True if an edge can be added from PredSU to SuccSU without creating a cycle. More...

bool	addEdge (SUnit *SuccSU, const SDep &PredDep)
	Add a DAG edge to the given SU with the given predecessor dependence data. More...

MachineBasicBlock::iterator	top () const

MachineBasicBlock::iterator	bottom () const

void	enterRegion (MachineBasicBlock *bb, MachineBasicBlock::iterator begin, MachineBasicBlock::iterator end, unsigned regioninstrs) LLVM_OVERRIDE

virtual void	schedule ()

void	moveInstruction (MachineInstr *MI, MachineBasicBlock::iterator InsertPos)

const IntervalPressure &	getTopPressure () const
	Get current register pressure for the top scheduled instructions. More...

const RegPressureTracker &	getTopRPTracker () const

const IntervalPressure &	getBotPressure () const
	Get current register pressure for the bottom scheduled instructions. More...

const RegPressureTracker &	getBotRPTracker () const

const IntervalPressure &	getRegPressure () const
	Get register pressure for the entire scheduling region before scheduling. More...

const std::vector < PressureChange > &	getRegionCriticalPSets () const

PressureDiff &	getPressureDiff (const SUnit *SU)

const SUnit *	getNextClusterPred () const

const SUnit *	getNextClusterSucc () const

void	computeDFSResult ()

const SchedDFSResult *	getDFSResult () const
	Return a non-null DFS result if the scheduling strategy initialized it. More...

BitVector &	getScheduledTrees ()

unsigned	computeCyclicCriticalPath ()
	Compute the cyclic critical path through the DAG. More...

void	viewGraph (const Twine &Name, const Twine &Title) LLVM_OVERRIDE

void	viewGraph () LLVM_OVERRIDE
	Out-of-line implementation with no arguments is handy for gdb. More...

Public Member Functions inherited from llvm::ScheduleDAGInstrs
	ScheduleDAGInstrs (MachineFunction &mf, const MachineLoopInfo &mli, const MachineDominatorTree &mdt, bool IsPostRAFlag, LiveIntervals *LIS=0)

virtual	~ScheduleDAGInstrs ()

LiveIntervals *	getLIS () const
	Expose LiveIntervals for use in DAG mutators and such. More...

const TargetSchedModel *	getSchedModel () const
	Get the machine model for instruction scheduling. More...

const MCSchedClassDesc *	getSchedClass (SUnit *SU) const
	Resolve and cache a resolved scheduling class for an SUnit. More...

MachineBasicBlock::iterator	begin () const
	begin - Return an iterator to the top of the current scheduling region. More...

MachineBasicBlock::iterator	end () const
	end - Return an iterator to the bottom of the current scheduling region. More...

SUnit *	newSUnit (MachineInstr *MI)
	newSUnit - Creates a new SUnit and return a ptr to it. More...

SUnit *	getSUnit (MachineInstr *MI) const
	getSUnit - Return an existing SUnit for this MI, or NULL. More...

virtual void	startBlock (MachineBasicBlock *BB)
	startBlock - Prepare to perform scheduling in the given block. More...

virtual void	finishBlock ()
	finishBlock - Clean up after scheduling in the given block. More...

virtual void	exitRegion ()
	Notify that the scheduler has finished scheduling the current region. More...

void	buildSchedGraph (AliasAnalysis AA, RegPressureTracker RPTracker=0, PressureDiffs *PDiffs=0)

void	addSchedBarrierDeps ()

virtual void	finalizeSchedule ()

virtual void	dumpNode (const SUnit *SU) const

virtual std::string	getGraphNodeLabel (const SUnit *SU) const
	Return a label for a DAG node that points to an instruction. More...

virtual std::string	getDAGName () const
	Return a label for the region of code covered by the DAG. More...

Public Member Functions inherited from llvm::ScheduleDAG
	ScheduleDAG (MachineFunction &mf)

virtual	~ScheduleDAG ()

void	clearDAG ()
	clearDAG - clear the DAG state (between regions). More...

const MCInstrDesc *	getInstrDesc (const SUnit *SU) const

virtual void	addCustomGraphFeatures (GraphWriter< ScheduleDAG * > &) const

unsigned	VerifyScheduledDAG (bool isBottomUp)

Protected Member Functions
void	buildDAGWithRegPressure ()
	Build the DAG and setup three register pressure trackers. More...

void	postprocessDAG ()
	Apply each ScheduleDAGMutation step in order. More...

void	initQueues (ArrayRef< SUnit * > TopRoots, ArrayRef< SUnit * > BotRoots)
	Release ExitSU predecessors and setup scheduler queues. More...

void	scheduleMI (SUnit *SU, bool IsTopNode)
	Move an instruction and update register pressure. More...

void	updateQueues (SUnit *SU, bool IsTopNode)
	Update scheduler DAG and queues after scheduling an instruction. More...

void	placeDebugValues ()
	Reinsert debug_values recorded in ScheduleDAGInstrs::DbgValues. More...

void	dumpSchedule () const
	dump the scheduled Sequence. More...

void	initRegPressure ()

void	updatePressureDiffs (ArrayRef< unsigned > LiveUses)

void	updateScheduledPressure (const SUnit *SU, const std::vector< unsigned > &NewMaxPressure)

bool	checkSchedLimit ()

void	findRootsAndBiasEdges (SmallVectorImpl< SUnit * > &TopRoots, SmallVectorImpl< SUnit * > &BotRoots)

void	releaseSucc (SUnit SU, SDep SuccEdge)

void	releaseSuccessors (SUnit *SU)
	releaseSuccessors - Call releaseSucc on each of SU's successors. More...

void	releasePred (SUnit SU, SDep PredEdge)

void	releasePredecessors (SUnit *SU)
	releasePredecessors - Call releasePred on each of SU's predecessors. More...

Protected Member Functions inherited from llvm::ScheduleDAGInstrs
void	initSUnits ()

void	addPhysRegDataDeps (SUnit *SU, unsigned OperIdx)

void	addPhysRegDeps (SUnit *SU, unsigned OperIdx)

void	addVRegDefDeps (SUnit *SU, unsigned OperIdx)

void	addVRegUseDeps (SUnit *SU, unsigned OperIdx)

Protected Attributes
AliasAnalysis *	AA

RegisterClassInfo *	RegClassInfo

MachineSchedStrategy *	SchedImpl

SchedDFSResult *	DFSResult

BitVector	ScheduledTrees

ScheduleDAGTopologicalSort	Topo

std::vector < ScheduleDAGMutation * >	Mutations
	Ordered list of DAG postprocessing steps. More...

MachineBasicBlock::iterator	LiveRegionEnd

PressureDiffs	SUPressureDiffs

bool	ShouldTrackPressure
	Register pressure in this region computed by initRegPressure. More...

IntervalPressure	RegPressure

RegPressureTracker	RPTracker

std::vector< PressureChange >	RegionCriticalPSets

MachineBasicBlock::iterator	CurrentTop
	The top of the unscheduled zone. More...

IntervalPressure	TopPressure

RegPressureTracker	TopRPTracker

MachineBasicBlock::iterator	CurrentBottom
	The bottom of the unscheduled zone. More...

IntervalPressure	BotPressure

RegPressureTracker	BotRPTracker

const SUnit *	NextClusterPred
	Record the next node in a scheduled cluster. More...

const SUnit *	NextClusterSucc

unsigned	NumInstrsScheduled

Protected Attributes inherited from llvm::ScheduleDAGInstrs
const MachineLoopInfo &	MLI

const MachineDominatorTree &	MDT

const MachineFrameInfo *	MFI

LiveIntervals *	LIS
	Live Intervals provides reaching defs in preRA scheduling. More...

TargetSchedModel	SchedModel
	TargetSchedModel provides an interface to the machine model. More...

bool	IsPostRA
	isPostRA flag indicates vregs cannot be present. More...

bool	CanHandleTerminators

MachineBasicBlock *	BB
	The block in which to insert instructions. More...

MachineBasicBlock::iterator	RegionBegin
	The beginning of the range to be scheduled. More...

MachineBasicBlock::iterator	RegionEnd
	The end of the range to be scheduled. More...

unsigned	NumRegionInstrs
	Instructions in this region (distance(RegionBegin, RegionEnd)). More...

DenseMap< MachineInstr , SUnit >	MISUnitMap

VReg2UseMap	VRegUses

Reg2SUnitsMap	Defs

Reg2SUnitsMap	Uses

VReg2SUnitMap	VRegDefs
	Track the last instruction in this region defining each virtual register. More...

std::vector< SUnit * >	PendingLoads

DbgValueVector	DbgValues

MachineInstr *	FirstDbgValue

Additional Inherited Members
Public Attributes inherited from llvm::ScheduleDAG
const TargetMachine &	TM

const TargetInstrInfo *	TII

const TargetRegisterInfo *	TRI

MachineFunction &	MF

MachineRegisterInfo &	MRI

std::vector< SUnit >	SUnits

SUnit	EntrySU

SUnit	ExitSU

bool	StressSched

Protected Types inherited from llvm::ScheduleDAGInstrs
typedef std::vector< std::pair < MachineInstr , MachineInstr > >	DbgValueVector

Detailed Description

ScheduleDAGMI is an implementation of ScheduleDAGInstrs that schedules machine instructions while updating LiveIntervals and tracking regpressure.

Definition at line 275 of file MachineScheduler.h.

Constructor & Destructor Documentation

llvm::ScheduleDAGMI::ScheduleDAGMI	(	MachineSchedContext *	C,
		MachineSchedStrategy *	S
	)

inline

Definition at line 331 of file MachineScheduler.h.

References NumInstrsScheduled.

ScheduleDAGMI::~ScheduleDAGMI ( )

virtual

Definition at line 365 of file MachineScheduler.cpp.

References llvm::DeleteContainerPointers(), DFSResult, Mutations, and SchedImpl.

Member Function Documentation

bool ScheduleDAGMI::addEdge	(	SUnit *	SuccSU,
		const SDep &	PredDep
	)

Add a DAG edge to the given SU with the given predecessor dependence data.

Returns: true if the edge may be added without creating a cycle OR if an equivalent edge already existed (false indicates failure).

Definition at line 375 of file MachineScheduler.cpp.

References llvm::SUnit::addPred(), llvm::ScheduleDAGTopologicalSort::AddPred(), llvm::ScheduleDAG::ExitSU, llvm::SDep::getSUnit(), llvm::SDep::isArtificial(), llvm::ScheduleDAGTopologicalSort::IsReachable(), and Topo.

void llvm::ScheduleDAGMI::addMutation ( ScheduleDAGMutation * Mutation )

inline

Add a postprocessing step to the DAG builder. Mutations are applied in the order that they are added after normal DAG building and before MachineSchedStrategy initialization.

ScheduleDAGMI takes ownership of the Mutation object.

Definition at line 353 of file MachineScheduler.h.

References Mutations.

Referenced by createGenericSched().

MachineBasicBlock::iterator llvm::ScheduleDAGMI::bottom ( ) const

inline

Definition at line 369 of file MachineScheduler.h.

References CurrentBottom.

Referenced by llvm::ConvergingVLIWScheduler::pickNode().

void ScheduleDAGMI::buildDAGWithRegPressure ( )

protected

Build the DAG and setup three register pressure trackers.

Call ScheduleDAGInstrs::buildSchedGraph with register pressure tracking enabled. This sets up three trackers. RPTracker will cover the entire DAG region, TopTracker and BottomTracker will be initialized to the top and bottom of the DAG region without covereing any unscheduled instruction.

Definition at line 693 of file MachineScheduler.cpp.

References llvm::ScheduleDAGInstrs::BB, llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::RegPressureTracker::init(), initRegPressure(), LiveRegionEnd, llvm::RegPressureTracker::recede(), RegClassInfo, RegionCriticalPSets, llvm::ScheduleDAGInstrs::RegionEnd, llvm::RegPressureTracker::reset(), RPTracker, ShouldTrackPressure, and SUPressureDiffs.

Referenced by llvm::VLIWMachineScheduler::schedule(), and schedule().

bool ScheduleDAGMI::canAddEdge	(	SUnit *	SuccSU,
		SUnit *	PredSU
	)

True if an edge can be added from PredSU to SuccSU without creating a cycle.

Definition at line 371 of file MachineScheduler.cpp.

References llvm::ScheduleDAG::ExitSU, llvm::ScheduleDAGTopologicalSort::IsReachable(), and Topo.

bool ScheduleDAGMI::checkSchedLimit ( )

protected

Definition at line 475 of file MachineScheduler.cpp.

References CurrentBottom, CurrentTop, MISchedCutoff, and NumInstrsScheduled.

Referenced by llvm::VLIWMachineScheduler::schedule(), and schedule().

unsigned ScheduleDAGMI::computeCyclicCriticalPath ( )

Compute the cyclic critical path through the DAG.

Compute the max cyclic critical path through the DAG. The scheduling DAG only provides the critical path for single block loops. To handle loops that span blocks, we could use the vreg path latencies provided by MachineTraceMetrics instead. However, MachineTraceMetrics is not currently available for use in the scheduler.

The cyclic path estimation identifies a def-use pair that crosses the back edge and considers the depth and height of the nodes. For example, consider the following instruction sequence where each instruction has unit latency and defines an epomymous virtual register:

a->b(a,c)->c(b)->d(c)->exit

The cyclic critical path is a two cycles: b->c->b The acyclic critical path is four cycles: a->b->c->d->exit LiveOutHeight = height(c) = len(c->d->exit) = 2 LiveOutDepth = depth(c) + 1 = len(a->b->c) + 1 = 3 LiveInHeight = height(b) + 1 = len(b->c->d->exit) + 1 = 4 LiveInDepth = depth(b) = len(a->b) = 1

LiveOutDepth - LiveInDepth = 3 - 1 = 2 LiveInHeight - LiveOutHeight = 4 - 2 = 2 CyclicCriticalPath = min(2, 2) = 2

Definition at line 776 of file MachineScheduler.cpp.

References llvm::ScheduleDAGInstrs::BB, llvm::ArrayRef< T >::begin(), llvm::dbgs(), DEBUG, llvm::VNInfo::def, llvm::ArrayRef< T >::end(), llvm::SparseMultiSet< ValueT, KeyFunctorT, SparseT >::end(), llvm::ScheduleDAG::ExitSU, llvm::SparseMultiSet< ValueT, KeyFunctorT, SparseT >::find(), llvm::SUnit::getDepth(), llvm::SUnit::getHeight(), llvm::RegPressureTracker::getPressure(), llvm::ScheduleDAGInstrs::getSUnit(), llvm::LiveRange::getVNInfoBefore(), llvm::VNInfo::isPHIDef(), llvm::MachineBasicBlock::isSuccessor(), llvm::TargetRegisterInfo::isVirtualRegister(), llvm::SUnit::Latency, LI, llvm::RegisterPressure::LiveOutRegs, llvm::SUnit::NodeNum, llvm::LiveRange::Query(), RPTracker, llvm::ScheduleDAG::TRI, llvm::LiveQueryResult::valueIn(), and llvm::ScheduleDAGInstrs::VRegUses.

void ScheduleDAGMI::computeDFSResult ( )

Compute a DFSResult after DAG building is complete, and before any queue comparisons.

Definition at line 723 of file MachineScheduler.cpp.

References llvm::SchedDFSResult::clear(), llvm::BitVector::clear(), llvm::SchedDFSResult::compute(), DFSResult, llvm::SchedDFSResult::getNumSubtrees(), MinSubtreeSize, llvm::SchedDFSResult::resize(), llvm::BitVector::resize(), ScheduledTrees, and llvm::ScheduleDAG::SUnits.

void ScheduleDAGMI::dumpSchedule ( ) const

protected

dump the scheduled Sequence.

Definition at line 967 of file MachineScheduler.cpp.

References llvm::ScheduleDAGInstrs::begin(), llvm::dbgs(), llvm::ScheduleDAGInstrs::end(), llvm::ScheduleDAGInstrs::getSUnit(), and llvm::A64CC::MI.

Referenced by schedule().

void ScheduleDAGMI::enterRegion	(	MachineBasicBlock *	bb,
		MachineBasicBlock::iterator	begin,
		MachineBasicBlock::iterator	end,
		unsigned	regioninstrs
	)

virtual

Implement the ScheduleDAGInstrs interface for handling the next scheduling region. This covers all instructions in a block, while schedule() may only cover a subset.

enterRegion - Called back from MachineScheduler::runOnMachineFunction after crossing a scheduling boundary. [begin, end) includes all instructions in the region, including the boundary itself and single-instruction regions that don't get scheduled.

Reimplemented from llvm::ScheduleDAGInstrs.

Definition at line 490 of file MachineScheduler.cpp.

References llvm::PressureDiffs::clear(), llvm::MachineBasicBlock::end(), llvm::ScheduleDAGInstrs::enterRegion(), llvm::MachineSchedStrategy::initPolicy(), LiveRegionEnd, llvm::next(), llvm::ScheduleDAGInstrs::RegionEnd, SchedImpl, llvm::MachineSchedStrategy::shouldTrackPressure(), ShouldTrackPressure, and SUPressureDiffs.

void ScheduleDAGMI::findRootsAndBiasEdges	(	SmallVectorImpl< SUnit * > &	TopRoots,
		SmallVectorImpl< SUnit * > &	BotRoots
	)

protected

Definition at line 733 of file MachineScheduler.cpp.

References llvm::SUnit::biasCriticalPath(), llvm::ScheduleDAG::ExitSU, I, llvm::SUnit::isBoundaryNode(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), and llvm::ScheduleDAG::SUnits.

Referenced by llvm::VLIWMachineScheduler::schedule(), and schedule().

const IntervalPressure& llvm::ScheduleDAGMI::getBotPressure ( ) const

inline

Get current register pressure for the bottom scheduled instructions.

Definition at line 392 of file MachineScheduler.h.

References BotPressure.

const RegPressureTracker& llvm::ScheduleDAGMI::getBotRPTracker ( ) const

inline

Definition at line 393 of file MachineScheduler.h.

References BotRPTracker.

Referenced by llvm::ConvergingVLIWScheduler::pickNode(), and llvm::ConvergingVLIWScheduler::pickNodeBidrectional().

const SchedDFSResult* llvm::ScheduleDAGMI::getDFSResult ( ) const

inline

Return a non-null DFS result if the scheduling strategy initialized it.

Definition at line 415 of file MachineScheduler.h.

References DFSResult.

const SUnit* llvm::ScheduleDAGMI::getNextClusterPred ( ) const

inline

Definition at line 406 of file MachineScheduler.h.

References NextClusterPred.

const SUnit* llvm::ScheduleDAGMI::getNextClusterSucc ( ) const

inline

Definition at line 408 of file MachineScheduler.h.

References NextClusterSucc.

PressureDiff& llvm::ScheduleDAGMI::getPressureDiff ( const SUnit * SU )

inline

Definition at line 402 of file MachineScheduler.h.

References llvm::SUnit::NodeNum, and SUPressureDiffs.

Referenced by updatePressureDiffs(), and updateScheduledPressure().

const std::vector<PressureChange>& llvm::ScheduleDAGMI::getRegionCriticalPSets ( ) const

inline

Definition at line 398 of file MachineScheduler.h.

References RegionCriticalPSets.

Referenced by llvm::ConvergingVLIWScheduler::pickNodeFromQueue().

const IntervalPressure& llvm::ScheduleDAGMI::getRegPressure ( ) const

inline

Get register pressure for the entire scheduling region before scheduling.

Definition at line 396 of file MachineScheduler.h.

References RegPressure.

Referenced by llvm::ConvergingVLIWScheduler::pickNodeFromQueue().

BitVector& llvm::ScheduleDAGMI::getScheduledTrees ( )

inline

Definition at line 417 of file MachineScheduler.h.

References ScheduledTrees.

const IntervalPressure& llvm::ScheduleDAGMI::getTopPressure ( ) const

inline

Get current register pressure for the top scheduled instructions.

Definition at line 388 of file MachineScheduler.h.

References TopPressure.

const RegPressureTracker& llvm::ScheduleDAGMI::getTopRPTracker ( ) const

inline

Definition at line 389 of file MachineScheduler.h.

References TopRPTracker.

Referenced by llvm::ConvergingVLIWScheduler::pickNode(), and llvm::ConvergingVLIWScheduler::pickNodeBidrectional().

void ScheduleDAGMI::initQueues	(	ArrayRef< SUnit * >	TopRoots,
		ArrayRef< SUnit * >	BotRoots
	)

protected

Release ExitSU predecessors and setup scheduler queues.

Identify DAG roots and setup scheduler queues.

Definition at line 839 of file MachineScheduler.cpp.

References llvm::ArrayRef< T >::begin(), CurrentBottom, CurrentTop, llvm::ArrayRef< T >::end(), llvm::ScheduleDAG::EntrySU, llvm::ScheduleDAG::ExitSU, llvm::RegPressureTracker::getPos(), I, NextClusterPred, NextClusterSucc, nextIfDebug(), llvm::ArrayRef< T >::rbegin(), llvm::ScheduleDAGInstrs::RegionBegin, llvm::ScheduleDAGInstrs::RegionEnd, llvm::MachineSchedStrategy::registerRoots(), llvm::MachineSchedStrategy::releaseBottomNode(), releasePredecessors(), releaseSuccessors(), llvm::MachineSchedStrategy::releaseTopNode(), llvm::ArrayRef< T >::rend(), SchedImpl, llvm::RegPressureTracker::setPos(), ShouldTrackPressure, and TopRPTracker.

Referenced by llvm::VLIWMachineScheduler::schedule(), and schedule().

void ScheduleDAGMI::initRegPressure ( )

protected

Definition at line 510 of file MachineScheduler.cpp.

Referenced by buildDAGWithRegPressure().

bool llvm::ScheduleDAGMI::isTrackingPressure ( ) const

inline

Return true if register pressure tracking is enabled.

Definition at line 346 of file MachineScheduler.h.

References ShouldTrackPressure.

void ScheduleDAGMI::moveInstruction	(	MachineInstr *	MI,
		MachineBasicBlock::iterator	InsertPos
	)

Change the position of an instruction within the basic block and update live ranges and region boundary iterators.

This is normally called from the main scheduler loop but may also be invoked by the scheduling strategy to perform additional code motion.

Definition at line 458 of file MachineScheduler.cpp.

References llvm::ScheduleDAGInstrs::BB, llvm::A64CC::MI, llvm::ScheduleDAGInstrs::RegionBegin, and llvm::MachineBasicBlock::splice().

Referenced by scheduleMI().

void ScheduleDAGMI::placeDebugValues ( )

protected

Reinsert debug_values recorded in ScheduleDAGInstrs::DbgValues.

Reinsert any remaining debug_values, just like the PostRA scheduler.

Definition at line 944 of file MachineScheduler.cpp.

References llvm::ScheduleDAGInstrs::BB, llvm::ScheduleDAGInstrs::DbgValues, llvm::X86II::DE, llvm::ScheduleDAGInstrs::FirstDbgValue, P, llvm::prior(), llvm::ScheduleDAGInstrs::RegionBegin, llvm::ScheduleDAGInstrs::RegionEnd, and llvm::MachineBasicBlock::splice().

Referenced by llvm::VLIWMachineScheduler::schedule(), and schedule().

void ScheduleDAGMI::postprocessDAG ( )

protected

Apply each ScheduleDAGMutation step in order.

Apply each ScheduleDAGMutation step in order. This allows different instances of ScheduleDAGMI to perform custom DAG postprocessing.

Definition at line 717 of file MachineScheduler.cpp.

References Mutations.

Referenced by schedule().

void ScheduleDAGMI::releasePred	(	SUnit *	SU,
		SDep *	PredEdge
	)

protected

ReleasePred - Decrement the NumSuccsLeft count of a predecessor. When NumSuccsLeft reaches zero, release the predecessor node.

FIXME: Adjust PredSU height based on MinLatency.

Definition at line 426 of file MachineScheduler.cpp.

References llvm::dbgs(), llvm::SUnit::dump(), llvm::ScheduleDAG::EntrySU, llvm::SDep::getSUnit(), llvm::SDep::isCluster(), llvm::SDep::isWeak(), llvm_unreachable, NextClusterPred, llvm::SUnit::NumSuccsLeft, llvm::MachineSchedStrategy::releaseBottomNode(), SchedImpl, and llvm::SUnit::WeakSuccsLeft.

Referenced by releasePredecessors().

void ScheduleDAGMI::releasePredecessors ( SUnit * SU )

protected

releasePredecessors - Call releasePred on each of SU's predecessors.

Definition at line 449 of file MachineScheduler.cpp.

References I, llvm::SUnit::Preds, and releasePred().

Referenced by initQueues(), and updateQueues().

void ScheduleDAGMI::releaseSucc	(	SUnit *	SU,
		SDep *	SuccEdge
	)

protected

ReleaseSucc - Decrement the NumPredsLeft count of a successor. When NumPredsLeft reaches zero, release the successor node.

FIXME: Adjust SuccSU height based on MinLatency.

Definition at line 392 of file MachineScheduler.cpp.

References llvm::dbgs(), llvm::SUnit::dump(), llvm::ScheduleDAG::ExitSU, llvm::SDep::getSUnit(), llvm::SDep::isCluster(), llvm::SDep::isWeak(), llvm_unreachable, NextClusterSucc, llvm::SUnit::NumPredsLeft, llvm::MachineSchedStrategy::releaseTopNode(), SchedImpl, and llvm::SUnit::WeakPredsLeft.

Referenced by releaseSuccessors().

void ScheduleDAGMI::releaseSuccessors ( SUnit * SU )

protected

releaseSuccessors - Call releaseSucc on each of SU's successors.

Definition at line 415 of file MachineScheduler.cpp.

References I, releaseSucc(), and llvm::SUnit::Succs.

Referenced by initQueues(), and updateQueues().

void ScheduleDAGMI::schedule ( )

virtual

Implement ScheduleDAGInstrs interface for scheduling a sequence of reorderable instructions.

schedule - Called back from MachineScheduler::runOnMachineFunction after setting up the current scheduling region. [RegionBegin, RegionEnd) only includes instructions that have DAG nodes, not scheduling boundaries.

This is a skeletal driver, with all the functionality pushed into helpers, so that it can be easilly extended by experimental schedulers. Generally, implementing MachineSchedStrategy should be sufficient to implement a new scheduling algorithm. However, if a scheduler further subclasses ScheduleDAGMI then it will want to override this virtual method in order to update any specialized state.

Implements llvm::ScheduleDAGInstrs.

Reimplemented in llvm::VLIWMachineScheduler.

Definition at line 649 of file MachineScheduler.cpp.

References llvm::ScheduleDAGInstrs::begin(), buildDAGWithRegPressure(), checkSchedLimit(), CurrentBottom, CurrentTop, llvm::dbgs(), DEBUG, dumpSchedule(), findRootsAndBiasEdges(), llvm::ScheduleDAGTopologicalSort::InitDAGTopologicalSorting(), llvm::MachineSchedStrategy::initialize(), initQueues(), llvm::MachineSchedStrategy::pickNode(), placeDebugValues(), postprocessDAG(), SchedImpl, scheduleMI(), llvm::ScheduleDAG::SUnits, Topo, updateQueues(), viewGraph(), and ViewMISchedDAGs.

void ScheduleDAGMI::scheduleMI	(	SUnit *	SU,
		bool	IsTopNode
	)

protected

Move an instruction and update register pressure.

Definition at line 875 of file MachineScheduler.cpp.

References llvm::RegPressureTracker::advance(), BotRPTracker, CurrentBottom, CurrentTop, llvm::SUnit::getInstr(), llvm::RegPressureTracker::getPos(), llvm::RegPressureTracker::getPressure(), llvm::SUnit::isBottomReady(), llvm::SUnit::isTopReady(), llvm::RegisterPressure::MaxSetPressure, llvm::A64CC::MI, moveInstruction(), nextIfDebug(), priorNonDebug(), llvm::RegPressureTracker::recede(), llvm::RegPressureTracker::setPos(), ShouldTrackPressure, TopRPTracker, updatePressureDiffs(), and updateScheduledPressure().

Referenced by llvm::VLIWMachineScheduler::schedule(), and schedule().

MachineBasicBlock::iterator llvm::ScheduleDAGMI::top ( ) const

inline

Definition at line 368 of file MachineScheduler.h.

References CurrentTop.

Referenced by llvm::ConvergingVLIWScheduler::pickNode().

void ScheduleDAGMI::updatePressureDiffs ( ArrayRef< unsigned > LiveUses )

protected

Update the PressureDiff array for liveness after scheduling this instruction.

FIXME: Currently assuming single-use physregs.

Definition at line 598 of file MachineScheduler.cpp.

References llvm::PressureDiff::addPressureChange(), llvm::ScheduleDAGInstrs::BB, BotRPTracker, llvm::dbgs(), DEBUG, llvm::MachineBasicBlock::end(), llvm::SparseMultiSet< ValueT, KeyFunctorT, SparseT >::end(), llvm::ScheduleDAG::ExitSU, llvm::SparseMultiSet< ValueT, KeyFunctorT, SparseT >::find(), llvm::SUnit::getInstr(), llvm::RegPressureTracker::getPos(), getPressureDiff(), llvm::LiveRange::getVNInfoBefore(), llvm::SUnit::isScheduled, llvm::TargetRegisterInfo::isVirtualRegister(), LI, llvm::ScheduleDAG::MRI, nextIfDebug(), llvm::SUnit::NodeNum, llvm::LiveRange::Query(), llvm::ArrayRef< T >::size(), llvm::ScheduleDAG::TRI, llvm::LiveQueryResult::valueIn(), and llvm::ScheduleDAGInstrs::VRegUses.

Referenced by initRegPressure(), and scheduleMI().

void ScheduleDAGMI::updateQueues	(	SUnit *	SU,
		bool	IsTopNode
	)

protected

Update scheduler DAG and queues after scheduling an instruction.

Update scheduler queues after scheduling an instruction.

Definition at line 921 of file MachineScheduler.cpp.

References DFSResult, llvm::SchedDFSResult::getSubtreeID(), llvm::SUnit::isScheduled, releasePredecessors(), releaseSuccessors(), SchedImpl, llvm::MachineSchedStrategy::schedNode(), ScheduledTrees, llvm::SchedDFSResult::scheduleTree(), llvm::MachineSchedStrategy::scheduleTree(), llvm::BitVector::set(), and llvm::BitVector::test().

Referenced by llvm::VLIWMachineScheduler::schedule(), and schedule().

void ScheduleDAGMI::updateScheduledPressure	(	const SUnit *	SU,
		const std::vector< unsigned > &	NewMaxPressure
	)

protected

Definition at line 571 of file MachineScheduler.cpp.

References llvm::PressureDiff::begin(), BotRPTracker, llvm::dbgs(), DEBUG, llvm::PressureDiff::end(), llvm::RegPressureTracker::getLiveThru(), getPressureDiff(), llvm::RegisterClassInfo::getRegPressureSetLimit(), llvm::TargetRegisterInfo::getRegPressureSetName(), I, RegClassInfo, RegionCriticalPSets, and llvm::ScheduleDAG::TRI.

Referenced by scheduleMI().

void ScheduleDAGMI::viewGraph	(	const Twine &	Name,
		const Twine &	Title
	)

virtual

viewGraph - Pop up a ghostview window with the reachable parts of the DAG rendered using 'dot'.

Reimplemented from llvm::ScheduleDAG.

Definition at line 3128 of file MachineScheduler.cpp.

References llvm::errs(), and llvm::ViewGraph().

void ScheduleDAGMI::viewGraph ( )

virtual

Out-of-line implementation with no arguments is handy for gdb.

Reimplemented from llvm::ScheduleDAG.

Definition at line 3138 of file MachineScheduler.cpp.

References llvm::ScheduleDAGInstrs::getDAGName().

Referenced by schedule().

Member Data Documentation

AliasAnalysis* llvm::ScheduleDAGMI::AA

protected

Definition at line 277 of file MachineScheduler.h.

IntervalPressure llvm::ScheduleDAGMI::BotPressure

protected

Definition at line 317 of file MachineScheduler.h.

Referenced by getBotPressure().

RegPressureTracker llvm::ScheduleDAGMI::BotRPTracker

protected

Definition at line 318 of file MachineScheduler.h.

Referenced by getBotRPTracker(), initRegPressure(), scheduleMI(), updatePressureDiffs(), and updateScheduledPressure().

MachineBasicBlock::iterator llvm::ScheduleDAGMI::CurrentBottom

protected

The bottom of the unscheduled zone.

Definition at line 316 of file MachineScheduler.h.

Referenced by bottom(), checkSchedLimit(), initQueues(), llvm::VLIWMachineScheduler::schedule(), schedule(), and scheduleMI().

MachineBasicBlock::iterator llvm::ScheduleDAGMI::CurrentTop

protected

The top of the unscheduled zone.

Definition at line 311 of file MachineScheduler.h.

Referenced by checkSchedLimit(), initQueues(), llvm::VLIWMachineScheduler::schedule(), schedule(), scheduleMI(), and top().

SchedDFSResult* llvm::ScheduleDAGMI::DFSResult

protected

Information about DAG subtrees. If DFSResult is NULL, then SchedulerTrees will be empty.

Definition at line 283 of file MachineScheduler.h.

Referenced by computeDFSResult(), getDFSResult(), updateQueues(), and ~ScheduleDAGMI().

MachineBasicBlock::iterator llvm::ScheduleDAGMI::LiveRegionEnd

protected

Definition at line 293 of file MachineScheduler.h.

Referenced by buildDAGWithRegPressure(), enterRegion(), and initRegPressure().

std::vector<ScheduleDAGMutation*> llvm::ScheduleDAGMI::Mutations

protected

Ordered list of DAG postprocessing steps.

Definition at line 291 of file MachineScheduler.h.

Referenced by addMutation(), postprocessDAG(), and ~ScheduleDAGMI().

const SUnit* llvm::ScheduleDAGMI::NextClusterPred

protected

Record the next node in a scheduled cluster.

Definition at line 321 of file MachineScheduler.h.

Referenced by getNextClusterPred(), initQueues(), and releasePred().

const SUnit* llvm::ScheduleDAGMI::NextClusterSucc

protected

Definition at line 322 of file MachineScheduler.h.

Referenced by getNextClusterSucc(), initQueues(), and releaseSucc().

unsigned llvm::ScheduleDAGMI::NumInstrsScheduled

protected

The number of instructions scheduled so far. Used to cut off the scheduler at the point determined by misched-cutoff.

Definition at line 327 of file MachineScheduler.h.

Referenced by checkSchedLimit(), and ScheduleDAGMI().

RegisterClassInfo* llvm::ScheduleDAGMI::RegClassInfo

protected

Definition at line 278 of file MachineScheduler.h.

Referenced by buildDAGWithRegPressure(), initRegPressure(), and updateScheduledPressure().

std::vector<PressureChange> llvm::ScheduleDAGMI::RegionCriticalPSets

protected

List of pressure sets that exceed the target's pressure limit before scheduling, listed in increasing set ID order. Each pressure set is paired with its max pressure in the currently scheduled regions.

Definition at line 308 of file MachineScheduler.h.

Referenced by buildDAGWithRegPressure(), getRegionCriticalPSets(), initRegPressure(), and updateScheduledPressure().